Altering the FPGA clock frequency of the Mojo

The Spartan 6 FPGA that comes with the Mojo uses a default clock frequency of 50 MHz.  While this is sufficient for almost all tasks, there are times when it might be necessary to increase that.  For example, I have a particular use-case that requires a 14-bit PWM signal to […]

Follow-up to LED characterisation

In a previous post I outlined a preliminary plan for how to configure an FPGA to characterise the response of a photoresistor to illumination by an LED whose brightness was controlled via the duty cycle of a PWM signal.  In that post I wrote that the required behaviour suggested a […]

Characterising system response with an FPGA

Due to a need to add an FPGA to the control stack that I have been developing (please see the previous 4 or 5 blog entries), I have started to plan the implementation of a PID feedback loop on the Spartan 6 Xilinx FPGA that comes with the Mojo development […]